C8051F380-TB【PDF 123/321 页】DEV KIT FOR C8051F38X

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C8051F380/1/2/3/4/5/6/7/C

SFR Definition 16.3. EIE1: Extended Interrupt Enable 1

Bit

Name

Type

Reset

7

ET3

R/W

0

6

ECP1

R/W

0

5

ECP0

R/W

0

4

EPCA0

R/W

0

3

EADC0

R/W

0

2

EWADC0

R/W

0

1

EUSB0

R/W

0

0

ESMB0

R/W

0

SFR Address = 0xE6; SFR Page = All Pages

Bit Name

Function

7

6

5

4

3

ET3

ECP1

ECP0

EPCA0

EADC0

Enable Timer 3 Interrupt.

This bit sets the masking of the Timer 3 interrupt.

0: Disable Timer 3 interrupts.

1: Enable interrupt requests generated by the TF3L or TF3H flags.

Enable Comparator1 (CP1) Interrupt.

This bit sets the masking of the CP1 interrupt.

0: Disable CP1 interrupts.

1: Enable interrupt requests generated by the CP1RIF or CP1FIF flags.

Enable Comparator0 (CP0) Interrupt.

This bit sets the masking of the CP0 interrupt.

0: Disable CP0 interrupts.

1: Enable interrupt requests generated by the CP0RIF or CP0FIF flags.

Enable Programmable Counter Array (PCA0) Interrupt.

This bit sets the masking of the PCA0 interrupts.

0: Disable all PCA0 interrupts.

1: Enable interrupt requests generated by PCA0.

Enable ADC0 Conversion Complete Interrupt.

This bit sets the masking of the ADC0 Conversion Complete interrupt.

0: Disable ADC0 Conversion Complete interrupt.

1: Enable interrupt requests generated by the AD0INT flag.

2

EWADC0 Enable Window Comparison ADC0 Interrupt.

This bit sets the masking of ADC0 Window Comparison interrupt.

0: Disable ADC0 Window Comparison interrupt.

1: Enable interrupt requests generated by ADC0 Window Compare flag (AD0WINT).

1

0

EUSB0

ESMB0

Enable USB (USB0) Interrupt.

This bit sets the masking of the USB0 interrupt.

0: Disable all USB0 interrupts.

1: Enable interrupt requests generated by USB0.

Enable SMBus0 Interrupt.

This bit sets the masking of the SMB0 interrupt.

0: Disable all SMB0 interrupts.

1: Enable interrupt requests generated by SMB0.

Rev. 1.4

123

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